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6 April 2007 Enabling gate etch process development using scatterometry
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Within the past few years, scatterometry has been embraced for many in-line measurement and disposition applications in the semiconductor industry. Yet, there remains some hesitation to fully rely on scatterometry for advanced process development, and instead to depend on CDSEMs and traditional failure analysis imaging methods (cross-section, TEM, FIB) to provide CD as well as profile information. This paper investigates whether scatterometry can be used as a suitable tool to supplement and sometimes replace XSEM metrology, and is an extension of the work from M. Sendelbach et. al. entitled "Improving STI etch process development by replacing XSEM metrology with scatterometry" from the 2005 SPIE Microlithography conference. A very large number of cross-sections were completed on the scatterometry grating targets as well as in-line disposition target and compared to optical measurements of the gratings with the purpose of decisively answering this question. The targets used for this work were etched 65nm node NFET gate structures. Measurements from cross-sections and scatterometry were processed to understand the top CD, middle CD, bottom CD and sidewall angle correlations. The investigation led to some interesting results, such as the existence of significant variation within a grating. In fact, there was enough variation to indicate that one or a few cross-sections may not represent the actual process or the "average" state of an array of lines, making XSEM metrology a poor quantitative method when used for process development. Scatterometry measurements of middle and bottom CDs show excellent correlation to cross-section results of both the grating and disposition targets.
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Jophy Koshy, Matthew Sendelbach, and Pedro Herrera "Enabling gate etch process development using scatterometry", Proc. SPIE 6518, Metrology, Inspection, and Process Control for Microlithography XXI, 65184X (6 April 2007);

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