Recently, photolithography process is facing many difficulties in patterning the circuit adequately, mainly due to the rapid decrease of the k1 factor. The limitation of numerical aperture (NA) causes the distortion of printed patterns, such as corner rounding, line end shortening, and the different bias between isolated and dense figures. The optical proximity effect correction (OPC) is the most popular method to solve this problem. Especially, we should apply the model-based OPC to the critical layers as the circuit patterns get smaller and more complex. The success of model-based OPC largely depends on the quality of the model, which describes the physics in the resist under a specific optical condition. A "good" model should have both the low fitting error and the full chip coverage. Efforts to lower the fitting error can lead to the degradation of physical meaning, and this would result in insufficient coverage of the model. To settle this concern, we should extract test patterns for model calibration that cover all the aerial image properties of full chip geometry. The investigation for selecting the data set for optical model tuning is also necessary to prevent the final model to be over fitted. In this paper, we will present test pattern selection strategy for optical model, and resist model.