21 March 2007 A simple and practical approach for building lithography simulation models using a limited set of CD data and SEM pictures
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A new method to calibrate optical lithography model using a combination of measured Critical Dimension (CD) data from the standard patterns and product layout SEM pictures have been developed. The CD data is composed of the measured CDs of through-pitch line patterns as well as isolated line and isolated space patterns. The SEM pictures for contour CD calibrations are from the product layouts. The small set of 1-D CD data is firstly used to calibrate the model. After best one-dimensional (1-D) data calibration accuracy is achieved, the model is used to predict the contour of the product layouts where the SEM pictures are taken. The simulated contours are overlaid with the SEM pictures to identify the mismatch locations. Additional calibration gauges at the locations are then added to the model to improve the predicted CD accuracy of 2- dimensional (2-D) patterns such as line-to-tip, tip-to-tip, and corner. In comparison with the SEM picture CDs, this procedure can be repeated several times until desired accuracy of the predicted contours is achieved. This method can increase the model's 2-D edge prediction accuracy and can reduce the amount of CD data required for model calibration. This calibration method is used to generate the models for lithography process simulations for Xilinx's 65 nm product developments. Hot spots and out-of-spec OPC CD locations are identified using the models and later confirmed from in-line data.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Yan Wang, Yan Wang, Jonathan Ho, Jonathan Ho, Benjamin Lin, Benjamin Lin, C.-L. Lin, C.-L. Lin, Y.-C. Sheng, Y.-C. Sheng, Yoyi Gong, Yoyi Gong, Steven Hsu, Steven Hsu, Kechih Wu, Kechih Wu, } "A simple and practical approach for building lithography simulation models using a limited set of CD data and SEM pictures", Proc. SPIE 6521, Design for Manufacturability through Design-Process Integration, 65211S (21 March 2007); doi: 10.1117/12.712392; https://doi.org/10.1117/12.712392

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