A critical step in developing type-II superlattice (T2SL) based LWIR focal plane array (FPA) technology is to achieve high performance levels in FPA pixel-sized devices having 20-40 μm pitch. At this scale, device performance tends to be limited by surface effects along mesa sidewalls which are etched to provide pixel isolation. While control of surface leakage has been achieved for MWIR T2SLs, as evidenced by the availability of commercially produced FPAs, the same cannot be said for LWIR T2SLs. Several groups have approached this problem as strictly a matter of surface treatment, including cleaning, chemical treatment, and dielectric coating or epitaxial overgrowth, but with limited success. Here we describe an approach based on shallow-etch mesa isolation (SEMI), which takes advantage of bandgap grading to isolate devices without exposing narrow-gap LWIR regions on diode mesas sidewalls. The SEMI process consists of defining mesa diodes with a shallow etch that passes only 20-100 nm past the junction of a graded-gap "W"-structured type-II superlattice p-i-n structure, where the bandgap remains large (>200 meV). A second, deeper etch is then used to define a trench along the chip border for access to the p-contact. As a result, SEMI diodes have only MWIR layers exposed along sidewalls, while the LWIR regions remain buried and unexposed. We also discuss an investigation of surface passivation of GaSb with sulfur using thioacetamide.