In this paper, we derive the input referred noise in terms of the on-pixel transistor device dimensions of the main noise
sources of our array, namely, the flicker noise of the pixel thin-film transistors (TFTs), and the reset noise. Theoretical
calculations and simulation results show that it is desirable to minimize the amplifier TFT gate dimensions, L1 and W1,
and to maximize the read-out TFT gate width, W2. Noise curves are presented as a function of transistor dimensions,
allowing the designer to choose appropriate device dimensions when designing flat-panel imaging circuits. In addition, it
is demonstrated how the optimal amplifier TFT gate width, W1, for the lowest-noise design, changes as a function of the
extraneous sense node capacitance. The noise simulations indicate that with proper device dimension design, it is
possible to achieve sub-500 electron input referred noise performance.