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13 September 2007 Development of an ASIC employing delta-sigma digitization for readout of x-ray CCDs
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X-ray CCDs have superior spatial resolution of ~20μm and moderate energy resolution of ~130 eV(FWHM) at 5.9 keV. On the other hand, the number of pixels assigned to each readout node is generally so large that it takes several seconds to process a frame data of the entire chip. Relatively low pixel readout rate in order to keep readout noise low also limits the timing resolution of X-ray CCDs. Although a large number of readout nodes is essential to improve the timing resolution, size and power consumption of conventional readout circuits prevent us from being implemented in X-ray CCD camera systems onboard satellites. We are developing an application specific integrated circuits (ASIC) for multi readout of X-ray CCD signals. The ASIC with the size of 3mm×3mm has four channels of readout electronics that employs the delta-sigma (ΔΣ) digitization. The fabrication process is a 0.35μm complimentary metal-oxide semiconductor (CMOS) process provided by Taiwan Semiconductor Manufacturing Company (TSMC). The equivalent input noise was about 33μV and the power consumption was about 70mW per chip at the pixel rate of 44 kHz. When we used the X-ray CCD whose sensitivity was 3 μV/e-, the equivalent noise charge was 10.8e- and the energy resolution was 168 eV(FWHM) at 5.9 keV. The noise level of our ASIC is comparable to that of the conventional readout systems.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
D. Matsuura, H. Nakajima, E. Miyata, H. Tsunemi, J. P. Doty, and H. Ikeda "Development of an ASIC employing delta-sigma digitization for readout of x-ray CCDs", Proc. SPIE 6686, UV, X-Ray, and Gamma-Ray Space Instrumentation for Astronomy XV, 66860L (13 September 2007);


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