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22 January 2008 Study of image processing system based on parallel structure of multiple DSPs
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Abstract
A novel parallel image processing architecture using multiple DSPs which can satisfy real-time image processing demands is proposed, The architecture is structured with high performance DSP interconnected by FPGA. Within FPGA the interconnection network by IRAM and the specific data communication protocol are implemented. The system inherits merits from the tightly coupled parallel system and the loosely coupled parallel system. The system architecture is reconfigurable and scalable. The performances measured in this platform show the high data transfer rate, and it can satisfy parallel real-time image processing demands of the complex task, large computation and high-speed data transfer. From the designed parallel hardware we analyze the benchmarks including acceleration ratio, parallel efficiency, selection of processing units, interconnection network etc. Finally some suggestions are given to further improve the system performance. The real-time image processing system based on parallel structure of multiple DSPs is easy to be implemented. Because the system structure is reconfigurable and scalable, it is easy to change the number of DSP and change the DSP into other series. So it has a bright future for the application of real-time image processing system.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jianxun Song and Qin-zhang Wu "Study of image processing system based on parallel structure of multiple DSPs", Proc. SPIE 6833, Electronic Imaging and Multimedia Technology V, 68333A (22 January 2008); https://doi.org/10.1117/12.767945
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