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8 January 2008 Research of different structure integrated photodetectors in standard CMOS technology
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Three kinds of structure photodetectors, N+/N-Well/P-Substrate, P+/N-Well/P-Substrate and finger N+/N-Well/P-Substrate, have been fabricated in CSMC 0.5μm CMOS process. The characteristics of different photodetectors are comparatively tested. The N+/N-Well/P-Substrate photodetector is choosed for construction of novel Spice model and fabrication of OEIC chip, considered about both high responsivity and good response speed. A novel Spice model of photodetector is introduced for compatible-design of OEIC. At 780nm and 2.5V reverse bias, the simulated responsivity based on the Spice model is 0.251A/W, close to the measured value 0.253A/W. Finally, a full CMOS monolithic OEIC is successfully accomplished with a gain of 38.1mV/μW in 780nm for optical-disc signal pickup.
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Xiang Cheng, Jiantao Bian, Chao Chen, and Wei Chen "Research of different structure integrated photodetectors in standard CMOS technology", Proc. SPIE 6838, Optoelectronic Devices and Integration II, 68381O (8 January 2008);

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