8 February 2008 Development of a low-cost 2.5-Gbps SFP optical transceiver using 0.18μm CMOS ICs
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Abstract
The high cost of optoelectronics components typically used for long-haul communication is prohibitive in the Fiber to the Home (FTTH) and Passive Optical Networks (PONs). One method of cost reduction is through the reducing the cost of the electronics in the transceiver and reducing the packaging cost. We report the development of low-cost 2.5-Gbps optical transceiver for Gigabit Passive Optical Network (GPON) using CMOS driver ICs and chip-on-board assembly method. We developed the Laser Diode Driver (LDD), Trans-impedance Amplifier (TIA), Limiting Amplifier (LA) and the Clock and Data Recovery (CDR) using CMOS technology for short reach application and developed the burst mode version of the ICs for PON applications. The ICs are designed in house and fabricated on a standard CMOS 8" wafer with 0.18μm technology. The devices operate at 1.8V and are low power in nature, thus reducing the demand on power dissipation. The transceiver consists of an un-cooled and direct modulated laser diode driven with a LDD, a high speed PIN photo-diode with amplifier and CMOS ICs. The bare CMOS ICs are attached on a transceiver substrate that is compliant with the small form-factor pluggable (SFP) package multisource agreement (MSA) and coupled to a 1310nm FP laser TOSA and a PIN ROSA with LC connector. The integrated transceiver is characterized up to 2.5-Gbps. In this publication, we present the detail of the module development, assembly methods and performance characterization at 1310nm.
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Yi Yoon Chai, Yi Yoon Chai, Jing Zhang, Jing Zhang, Pamidighantma V. Ramana, Pamidighantma V. Ramana, Guan Jie Yap, Guan Jie Yap, John Hon-Shing Lau, John Hon-Shing Lau, } "Development of a low-cost 2.5-Gbps SFP optical transceiver using 0.18μm CMOS ICs", Proc. SPIE 6899, Photonics Packaging, Integration, and Interconnects VIII, 68990U (8 February 2008); doi: 10.1117/12.764294; https://doi.org/10.1117/12.764294
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