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8 February 2008 Integration challenges for optical inteconnects
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The package integration of optical components with electronic integrated circuits (ICs) for optical interconnects is a subject of much debate and will, to a large extent, determine the performance of the optical interconnect system. In this paper we examine the challenges of incorporating optical interconnects into a computer system; specifically we cover several ways to integrate the optical components with a central processing unit (CPU) or chipset. Critical performance parameters such as the supported distance, power consumption and the achievable bandwidth are all impacted by the electrical integration between the IC and the optical components. Additional electrical link issues which also have a large impact on the performance of the link will be discussed as well; these include protocol related issues as well as signal integrity concerns, such as the jitter budget. We will also discuss the performance of some of the competing electrical technologies in order to provide a better understanding of the implementation challenge facing the developers of optical interconnect technology. Rack to rack communications are quickly moving to optical links, board to board communication is the next step and chip to chip communication is still further out as the electrical solutions for this topology have a great deal of headroom.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Andrew Alduino, Hai-Feng Liu, Abazar Mireshghi, Henning Braunisch, Christine Krause, and Mario Paniccia "Integration challenges for optical inteconnects", Proc. SPIE 6899, Photonics Packaging, Integration, and Interconnects VIII, 689910 (8 February 2008);

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