Paper
22 March 2008 Metrology characterization for self-aligned double patterning
Ami Berger, Sergey Latinsky, Maayan Bar-Zvi, Ram Peltinov, Jen Shu, Chris Ngai, James Yu, Huixiong Dai
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Abstract
Self-Aligned Double Patterning (SADP) scheme is considered as one of the most promising lithographic techniques to meet the challenges for aggressive flash 32 nm semiconductor technology node and beyond. Monitoring the SADP stages implies the necessity to use metrology methods that meet advanced technology nodes requirements. One important growing metrology factor is the Line Edge Roughness (LER). This factor is most relevant due to the unique processing of the outer vs. inner edges in the SADP process. The aim of the present study is to evaluate the right metrics to tightly monitor SADP process, including the roughness behavior of the features on SADP layers, and seek correspondence of LER characteristics between SADP sequential process stages. Additional element of this study will be to examine the performance of CD-SEM roughness analysis on small features, with the usage of improved LER measurement method that takes into account the contribution of SEM imaging noise to the obtained LER values.
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Ami Berger, Sergey Latinsky, Maayan Bar-Zvi, Ram Peltinov, Jen Shu, Chris Ngai, James Yu, and Huixiong Dai "Metrology characterization for self-aligned double patterning", Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 692211 (22 March 2008); https://doi.org/10.1117/12.774408
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KEYWORDS
Line edge roughness

Etching

Semiconducting wafers

Scanning electron microscopy

Double patterning technology

Metrology

Line width roughness

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