24 March 2008 MuGFET observation and CD measurement by using CD-SEM
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Proceedings Volume 6922, Metrology, Inspection, and Process Control for Microlithography XXII; 69222P (2008); doi: 10.1117/12.771861
Event: SPIE Advanced Lithography, 2008, San Jose, California, United States
Abstract
Multiple Gate Field Effect Transistors (MuGFETs) have been proposed to enable downsizing, when scaling the transistors to the 32nm technology node. The dimension of the gate on the surface of fin determines the effective channel length of the device. So, the characterization of the gate profiles at fin sidewalls becomes extremely critical. It is especially important to quantify the rounded intersection (etch residual) at the intersection of the fin and gate. In this report, we show top down images of a MuGFET taken with critical-dimension scanning electron microscopy (CD-SEM) and the results that were measured and characterized by measuring various portions of the pattern which will impact the MuGFET performance i.e. gate length, fin width. We will introduce a quantified relation between fin length and "its effect on the etch residue at the intersection of fin and gate". Next we discuss our approaches to analyze the variation of the shape of the gate at the fin sidewall.
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Tatsuya Maeda, Maki Tanaka, Miki Isawa, Kenji Watanabe, Norio Hasegawa, Kohei Sekiguchi, Rita Rooyackers, Nadine Collaert, Tom Vandeweyer, "MuGFET observation and CD measurement by using CD-SEM", Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69222P (24 March 2008); doi: 10.1117/12.771861; https://doi.org/10.1117/12.771861
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KEYWORDS
Etching

Semiconducting wafers

Transistors

Field effect transistors

Scanning electron microscopy

3D metrology

Edge roughness

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