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7 March 2008 Novel lithography rule check for full-chip side lobe detection
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Abstract
Attenuated PSM (Phase Shift Mask) has been widely adopted in contact lithography to enhance the resolution and process latitude. While the main drawback associated with the use of attenuated PSM is the side lobe printing, which yields unwanted resist erosion of area among patterned holes. Side lobes, if etched and filled in the following semiconductor processing, can cause electrical shorting, chip failure and device reliability problem, hence any side lobes are extremely undesirable. Usually, the side lobe detection for simple layouts can be conducted manually through the help of lithography simulation tools, but the detection of potential side lobe printing becomes far more challenging for full-chip production layouts. An efficient side-lobe detection approach was demonstrated in this study, with the use of assistant ring, polygon-based simulation instead of grid-based simulation has been enabled for full-chip side lobe detection. Furthermore, a model-based method for side lobe suppression was also demonstrated in our flow.
© (2008) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
T. S. Wu, Elvis Yang, T. H. Yang, K. C. Chen, and C. Y. Lu "Novel lithography rule check for full-chip side lobe detection", Proc. SPIE 6924, Optical Microlithography XXI, 692431 (7 March 2008); https://doi.org/10.1117/12.770882
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