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28 December 2007 Nios II implementation in CCD camera for Pi of the Sky experiment
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Proceedings Volume 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007; 693709 (2007) https://doi.org/10.1117/12.784585
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 2007, Wilga, Poland
Abstract
The concept of the Altera Nios II embedded processor implementation inside Field Programmable Gate Array (FPGA) of the CCD camera for the "Pi of the Sky" experiment is presented. The digital board of the CCD camera, its most important components, current implementation of firmware (VHDL) inside the FPGA and the role of external 8051 microcontroller is briefly described. The main goal of the presented work is to get rid of the external microcontroller and to design new system with Nios II processor built inside FPGA chip. Constraints for implementing the design into the existing camera boards are discussed. New possibilities offered by a larger FPGA for next generation of cameras are considered.
© (2007) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Maciej Kwiatkowski, Grzegorz Kasprowicz, Dominik Rybka, Ryszard S. Romaniuk, and Krzysztof T. Pozniak "Nios II implementation in CCD camera for Pi of the Sky experiment", Proc. SPIE 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 693709 (28 December 2007); https://doi.org/10.1117/12.784585
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