AVR microcontroller simulator for software implemented hardware fault tolerance algorithms research

Adam Piotrowski; Szymon Tarnowski; Andrzej Napieralski

doi:10.1117/12.784616

28 December 2007 AVR microcontroller simulator for software implemented hardware fault tolerance algorithms research

Adam Piotrowski, Szymon Tarnowski, Andrzej Napieralski

Proceedings Volume 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007; 69370X (2007) https://doi.org/10.1117/12.784616
Event: Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 2007, Wilga, Poland

Abstract

Reliability of new, advanced electronic systems becomes a serious problem especially in places like accelerators and synchrotrons, where sophisticated digital devices operate closely to radiation sources. One of the possible solutions to harden the microprocessor-based system is a strict programming approach known as the Software Implemented Hardware Fault Tolerance. Unfortunately, in real environments it is not possible to perform precise and accurate tests of the new algorithms due to hardware limitation. This paper highlights the AVR-family microcontroller simulator project equipped with an appropriate monitoring and the SEU injection systems.

Citation Download Citation

Adam Piotrowski, Szymon Tarnowski, and Andrzej Napieralski "AVR microcontroller simulator for software implemented hardware fault tolerance algorithms research", Proc. SPIE 6937, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2007, 69370X (28 December 2007); https://doi.org/10.1117/12.784616

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