22 July 2008 Evaluation of the Teledyne SIDECAR ASIC at cryogenic temperature using a visible hybrid H2RG focal plane array in 32 channel readout mode
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Abstract
Teledyne Imaging Sensors (TIS) has developed a new CMOS device known as the SIDECAR application-specific integrated circuit (ASIC). This single chip provides all the functionality of FPA drive electronics to operate visible and infrared imaging detectors with a fully digital interface. At the last SPIE conference we presented test and performance results of a Teledyne 2K×2K silicon PIN diode array hybridized to a Hawaii-2RG multiplexer, the Hybrid Visible Silicon Imager (HyViSI). This detector was read out with the ESO standard IR detector controller IRACE, which delivers detector limited performance. We have now tested the H2RG HyViSI detector with the new TIS SIDECAR ASIC in 32 channel readout mode at cryogenic temperatures. The SIDECAR has been evaluated down to 105 Kelvin operating temperature and performance results have been compared to those obtained with external electronics. We find that the SIDECAR ASIC provides performance equal to optimized external electronics.
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Reinhold J. Dorn, Reinhold J. Dorn, Siegfried Eschbaumer, Siegfried Eschbaumer, Donald N. B. Hall, Donald N. B. Hall, Gert Finger, Gert Finger, Leander Mehrgan, Leander Mehrgan, Manfred Meyer, Manfred Meyer, Joerg Stegmeier, Joerg Stegmeier, } "Evaluation of the Teledyne SIDECAR ASIC at cryogenic temperature using a visible hybrid H2RG focal plane array in 32 channel readout mode", Proc. SPIE 7021, High Energy, Optical, and Infrared Detectors for Astronomy III, 70210Q (22 July 2008); doi: 10.1117/12.788717; https://doi.org/10.1117/12.788717
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