As VLSI products are being developed rapidly, design rules of semiconductor devices are correspondingly shrinking. Therefore, the electric couplings between adjacent lines are increasing and this phenomenon requires control of critical dimension uniformity (CDU) more tightly. In addition to that, the development of lithography tool for sub- 40nm design rule (D/R) is being delayed, which makes most IC manufacturer drive double patterning technology (DPT) as next generation lithography (NGL) solution. CD control is one of critical issues to implement DPT for mass production, because CD of 1st pattern affects the formation of 2nd pattern seriously so that the uniformity of 1st pattern is more important.
In this paper, the improvement of CD uniformity is investigated, especially for 3Xnm flash device for where double patterning technique is applied. Several methods have been considered or evaluated to improve CD uniformity. Among them, DoseMapperTM of ASML shows promising results. Using this system, in field uniformity (IFU) & in wafer uniformity (IWU) are improved 14% in 3&sgr;. To be implemented as a technology for mass production and to maintain the best performance, several efforts in terms of metrology and process will be further discussed in this paper.