4 December 2008 Resolution enhancement techniques for contact hole printing of sub-50nm memory device
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Proceedings Volume 7140, Lithography Asia 2008; 714034 (2008) https://doi.org/10.1117/12.804646
Event: SPIE Lithography Asia - Taiwan, 2008, Taipei, Taiwan
Abstract
In resolution limited lithography process, the contact hole pattern is one of the most challenging features to be printed on wafer. A lot of lithographers struggle to make robust hole patterns under 45nm node, especially if the contact hole patterns are composed of dense array and isolated hole simultaneously. The strong OAI(Off Axis Illumination) such as dipole is very useful technique to enhance resolution for specific features. However the contact hole formed by dipole illumination usually has elliptical shape and the asymmetric feature leads to increment of chip size. In this paper, we will explore the lithographic feasibility for the coexisting dense array with isolated contact holes and the technical issues are investigated to generate finer contact hole for both dense and isolated feature. Conventional illumination with resist shrinkage technique will be used to generate dense array and isolated contact hole maintaining original shape for the sub-50nm node memory device.
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Hye-Jin Shin, Tae-jun You, Min-Ae Yoo, Jin-Young Choi, Kiho Yang, Chan-Ha Park, Dong-gyu Yim, "Resolution enhancement techniques for contact hole printing of sub-50nm memory device", Proc. SPIE 7140, Lithography Asia 2008, 714034 (4 December 2008); doi: 10.1117/12.804646; https://doi.org/10.1117/12.804646
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