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17 March 2009 On the integration of memristors with CMOS using nanoimprint lithography
Qiangfei Xia, W. M. Tong, W. Wu, J. J. Yang, X. Li, W. Robinett, T. Cardinali, M. Cumbie, J. E. Ellenson, P. Kuekes, R. S. Williams
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Proceedings Volume 7271, Alternative Lithographic Technologies; 727106 (2009) https://doi.org/10.1117/12.814327
Event: SPIE Advanced Lithography, 2009, San Jose, California, United States
Abstract
Memristors were vertically integrated with CMOS circuits using nanoimprint lithography (NIL), making a transistor/memeristor hybrid circuit. Several planarization technologies were developed for the CMOS substrates to meet the surface planarity requirement for NIL. Accordingly, different integration schemes were developed and optimized. UV-curable NIL (UV-NIL) using a double layer spin-on resists was carried out to pattern the electrodes for memristors. This is the first demonstration of NIL on active CMOS substrates that are fabricated in a CMOS fab. Our work demonstrates that NIL is compatible with commercial IC fabrication process. It was also demonstrated that the memristors are integratable with traditional CMOS to make hybrid circuits without changing the current infrastructure in IC industry.
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Qiangfei Xia, W. M. Tong, W. Wu, J. J. Yang, X. Li, W. Robinett, T. Cardinali, M. Cumbie, J. E. Ellenson, P. Kuekes, and R. S. Williams "On the integration of memristors with CMOS using nanoimprint lithography", Proc. SPIE 7271, Alternative Lithographic Technologies, 727106 (17 March 2009); https://doi.org/10.1117/12.814327
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KEYWORDS
Nanoimprint lithography
Electrodes
Metals
Ultraviolet radiation
Reactive ion etching
Nanowires
Switching
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