Paper
16 March 2009 Etch aware optical proximity correction: a first step toward integrated pattern engineering
D. N. Dunn, S. Mansfield, I. Stobert, C. Sarma, G. Lembach, J. Liu, K. Herold
Author Affiliations +
Abstract
We present an etch-aware optical proximity correction (OPC) flow that is intended to optimize post-etch patterns on wafer. We take advantage of resource efficient empirical etch models and a model based retargeting scheme to determine post-develop in-plane resist targets required to achieve post-etch critical dimensions. The goal of this flow is to optimize final patterns on wafer rather than two independent patterns from lithography and etch. As part of this flow, we cover important aspects of etch process variability implications for etch aware OPC. Metrics for total pattern transfer are developed and explored with an eye toward optimizing pattern transfer. We present results from a 45 nm poly-silicon and 32 nm shallow trench isolation levels where etch aware OPC has been applied and compare these results with conventional resist based OPC schemes. Finally, implications of this flow for unit process developers in lithography and reactive ion etch are explored. We present a process optimization flow that incorporates model based retargeting into resolution enhancement technology selection, materials selection as well as lithographic and reactive ion etch process development.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
D. N. Dunn, S. Mansfield, I. Stobert, C. Sarma, G. Lembach, J. Liu, and K. Herold "Etch aware optical proximity correction: a first step toward integrated pattern engineering", Proc. SPIE 7274, Optical Microlithography XXII, 727412 (16 March 2009); https://doi.org/10.1117/12.814224
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Cited by 3 scholarly publications and 2 patents.
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KEYWORDS
Optical proximity correction

Etching

Lithography

Semiconducting wafers

Photoresist processing

Process modeling

Reactive ion etching

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