16 March 2009 Pre-OPC layout decomposition for improved image fidelity
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Abstract
In microelectronics manufacturing, photolithography is the art of transferring pattern shapes printed on a mask to silicon wafers by the use of special imaging systems. These imaging systems stopped reducing exposure wavelength at 193nm. However, the industry demand for tighter design shapes and smaller structures on wafer has not stopped. To overcome some of the restrictions associated with the photographic process, new methods for Resolution Enhancement Techniques (RET) are being constantly explored and applied. An essential step in any RET method is Optical Proximity Correction (OPC). In this process the edges of the target desired shapes are manipulated to compensate for light diffraction effects and result in shapes on wafer as close as possible to the desired shapes. Manipulation of the shapes is always restricted by Mask Rules Checks (MRCs). The MRCs are the rules that assure that the pattern coming out of OPC can be printed on the mask without any catastrophic faults. Essential as they are, MRCs also place constrains on the solutions explored by the OPC algorithms. In this paper, an automated algorithm has been implemented to overcome MRC limitations to RET by decomposing the original layout at the places where regular RET hit the MRC during OPC.This algorithm has been applied to test cases where simulation results showed much better printability than the normal conventional solutions. This solution has also been tested and verified on silicon.
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Shady Abdelwahed, Shady Abdelwahed, Rami Fathy, Rami Fathy, Jae Hyun Kang, Jae Hyun Kang, Jong Doo Kim, Jong Doo Kim, Youngmi Kim, Youngmi Kim, } "Pre-OPC layout decomposition for improved image fidelity", Proc. SPIE 7274, Optical Microlithography XXII, 72742I (16 March 2009); doi: 10.1117/12.816825; https://doi.org/10.1117/12.816825
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