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12 March 2009 Computational requirements for OPC
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Abstract
In this paper, we provide some data on the actual scaling of OPC runtime that we have experienced at AMD. We review the expected OPC requirements down to the 16 nm node and develop a model to predict the total CPU requirements to process a single chip design. We will also review the scalability of "hardware acceleration" under a variety of scenarios.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chris Spence and Scott Goad "Computational requirements for OPC", Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72750U (12 March 2009); https://doi.org/10.1117/12.813522
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