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12 March 2009 Source-mask selection using computational lithography incorporating physical resist models
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The RET selection process, for 32 nm and 22 nm technology nodes, is becoming evermore complex due to an increase in the availability of strong resolution enhancements (e.g., polarization control, custom exotic illuminators, hyper NA). Lithographers often select the illuminator geometries based on analyzing aerial images for a limited set of structures. However, source-shape geometries optimized using this methodology is not always optimal for other complex patterns. This leads to critical hot-spots on the final wafer images in form of bridges and gaps. Lithographers would like to analyze the impact of selected source-shape on wafer results for the complex patterns before running the physical experiments. Physics based computational lithography tools allow users to predict the accurate wafer images. This approach allows users to run large factorial experiments for simple and complex designs without running physical experiments. In this study, we will analyze the lithographic performance of simple 1D patterns using aerial image models and physical resist models with calibrated resist parameters1,2,3,4 for two commercial resists. Our goal is to determine whether physical resist models yield a different optimal solution as compared to the aerial image model. We will explore several imaging parameters - like Numerical Aperture (NA), source geometries (Annular, Quadrupole, etc.), illumination configurations and anchor features for different sizes and pitches. We will apply physics based OPC and compute common process windows using physical model. In the end, we will analyze and recommend the optimal source-mask solution for given set of designs based on all the models.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Sanjay Kapasi, Stewart Robertson, John Biafore, and Mark D. Smith "Source-mask selection using computational lithography incorporating physical resist models", Proc. SPIE 7275, Design for Manufacturability through Design-Process Integration III, 72750W (12 March 2009);

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