Due to the corner rounding effect in litho process, it is hard to make the wafer image as sharp as the
drawn layout near two-dimensional pattern in IC design1, 2. The inevitable gap between the design and
the wafer image make the two-dimensional pattern correction complex and sensitive to the OPC
correction recipe. However, there are lots of different two-dimensional patterns, for example, concave
corner, convex corner, jog, line-end and space-end. Especially for Metal layer, there are lots of jogs are
created by the rule-based OPC. So OPC recipe developers have to spend lots to efforts to handle
different two-dimensional fragment with their own experience.
In this paper, a general method is proposed to simplify the correction of two-dimensional structures.
The design is firstly smoothed and then simulation sites are move from the drawn layer to this new
layer. It means that the smoothed layer is used as OPC target instead of the drawn Manhattan pattern.
Using this method, the OPC recipe tuning becomes easier. In addition, the convergence of
two-dimensional pattern is also improved thus the runtime is reduced.