20 May 2009 Storage and compression design of high speed CCD
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Abstract
In current field of CCD measurement, large area and high resolution CCD is used to obtain big measurement image, so that, speed and capacity of CCD requires high performance of later storage and process system. The paper discusses how to use SCSI hard disk to construct storage system and use DSPs and FPGA to realize image compression. As for storage subsystem, Because CCD is divided into multiplex output, SCSI array is used in RAID0 way. The storage system is com posed of high speed buffer, DM A controller, control M CU, SCSI protocol controller and SCSI hard disk. As for compression subsystem, according to requirement of communication and monitor system, the output is fixed resolution image and analog PA L signal. The compression means is JPEG 2000 standard, in which, 9/7 wavelets in lifting format is used. 2 DSPs and FPGA are used to com pose parallel compression system. The system is com posed of FPGA pre-processing module, DSP compression module, video decoder module, data buffer module and communication module. Firstly, discrete wavelet transform and quantization is realized in FPGA. Secondly, entropy coding and stream adaption is realized in DSPs. Last, analog PA L signal is output by Video decoder. Data buffer is realized in synchronous dual-port RAM and state of subsystem is transfer to controller. Through subjective and objective evaluation, the storage and compression system satisfies the requirement of system.
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Xichang Cai, LinPei Zhai, "Storage and compression design of high speed CCD", Proc. SPIE 7283, 4th International Symposium on Advanced Optical Manufacturing and Testing Technologies: Optical Test and Measurement Technology and Equipment, 72831F (20 May 2009); doi: 10.1117/12.828663; https://doi.org/10.1117/12.828663
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