29 April 2009 Programmable genetic algorithm IP core for sensing and surveillance applications
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Abstract
Real-time evolvable systems are possible with a hardware implementation of Genetic Algorithms (GA). We report the design of an IP core that implements a general purpose GA engine which has been successfully synthesized and verified on a Xilinx Virtex II Pro FPGA Device (XC2VP30). The placed and routed IP core has an area utilization of only 13% and clock speed of 50MHz. The GA core can be customized in terms of the population size, number of generations, cross-over and mutation rates, and the random number generator seed. The GA engine can be tailored to a given application by interfacing with the application specific fitness evaluation module as well as the required storage memory (to store the current and new populations). The core is soft in nature i.e., a gate-level netlist is provided which can be readily integrated with the user's system. The GA IP core can be readily used in FPGA based platforms for space and military applications (for e.g., surveillance, target tracking). The main advantages of the IP core are its programmability, small footprint, and low power consumption. Examples of concept systems in sensing and surveillance domains will be presented.
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Srinivas Katkoori, Srinivas Katkoori, Pradeep Fernando, Pradeep Fernando, Hariharan Sankaran, Hariharan Sankaran, Adrian Stoica, Adrian Stoica, Didier Keymeulen, Didier Keymeulen, Ricardo Zebulum, Ricardo Zebulum, } "Programmable genetic algorithm IP core for sensing and surveillance applications", Proc. SPIE 7347, Evolutionary and Bio-Inspired Computation: Theory and Applications III, 73470M (29 April 2009); doi: 10.1117/12.820572; https://doi.org/10.1117/12.820572
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