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28 May 2009 A 100mA fractional step-down charge pump with digital control
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Proceedings Volume 7363, VLSI Circuits and Systems IV; 73630U (2009) https://doi.org/10.1117/12.822917
Event: SPIE Europe Microtechnologies for the New Millennium, 2009, Dresden, Germany
Abstract
A switched capacitor step-down DC-DC converter (charge pump) is proposed. High efficiency is achieved by combination of fractional conversion ratios (different step-down modes of operation), output voltage sensing and pulse skipping based digital control techniques. Two control techniques were implemented with automatic change between modes and their results are discussed and compared. The power module has 9 switches, implemented with 14 power transistors, and a current limit circuit to mitigate the in-rush current in startup phase. This circuit has been designed in AMS C35B4 (0.35um) CMOS process. The charge pump was designed to provide a maximum load current of 100mA. The peak-to-peak output voltage ripple is less than 30mV with two 3uF flying capacitors and one 20uF output capacitor. Peak and average efficiencies, with maximum load current, are over 80% and 68%, respectively.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Valter A. L. Sadio, Abílio E. M. Parreira, and Marcelino B. Santos "A 100mA fractional step-down charge pump with digital control", Proc. SPIE 7363, VLSI Circuits and Systems IV, 73630U (28 May 2009); https://doi.org/10.1117/12.822917
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