Nano-imprint lithography (NIL) has been counted as one of the lithography candidates for hp32nm node and
beyond and has showed excellent resolution capability with remarkable low line edge roughness that is attracting many
researchers in the industry who were searching for the finest patterning technology. Therefore, recently we have been
focusing on the resolution improvement on the NIL templates with the 100keV acceleration voltage spot beam (SB) EB
writer and the 50keV acceleration voltage variable shaped beam (VSB) EB writer.
The 100keV SB writers have high resolution capability, but they show fatally low throughput if we need full
chip writing. Usually templates for resolution pioneers needed just a small field (several hundred microns square or so),
but recently requirements for full chip templates are increasing. For full chip writing, we have also started the resolution
improvement with the 50keV VSB writers used in current 4X photomask manufacturing. The 50keV VSB writers could
generate full chip pattern in a reasonable time though resolution limits are inferior to that with the 100keV SB writers.
In this paper, we will show latest results with both the 100keV SB and the 50keV VSB EB writers. With the
100keV SB EB writer, we have achieved down to hp15nm resolution for line and space pattern, but found that to achieve
further improvement, an innovation in pattern generation method or material would be inevitable. With the 50keV VSB
EB writer, we have achieved down to hp22nm resolution for line and space pattern.
Though NIL has excellent resolution capability, solutions for defect inspection and repair are not clearly shown
yet. In this paper, we will show preliminary inspection results with an EB inspection tool. We tested an EB inspection
tool by Hermes Microvision, Inc. (HMI), which was originally developed for and are currently used as a wafer
inspection tool, and now have been started to seek the application for mask use, using a programmed defect template.