Implementation of a speculative Ling adder

Malhar Mehta; Amith Kumar Nuggehalli Ramachandra; Earl E. Swartzlander Jr.

doi:10.1117/12.824730

24 August 2009 Implementation of a speculative Ling adder

Malhar Mehta, Amith Kumar Nuggehalli Ramachandra, Earl E. Swartzlander Jr.

Proceedings Volume 7444, Mathematics for Signal and Information Processing; 74440K (2009) https://doi.org/10.1117/12.824730
Event: SPIE Optical Engineering + Applications, 2009, San Diego, California, United States

Abstract

A large number of adder designs are available based on the constraints of a particular application, e.g., speed, fanout, wire complexity, area, power consumption, etc. However, a lower-bound has been set on the speed of these adders and it has not been possible to design reliable adders faster than this lower bound. This paper deals with the design and implementation of a speculative adder, that takes advantage of the probabilistic dependence of the maximum carrypropagate chain length on the adder operand size. That is, this type of adder is designed to produce correct results for a vast majority of inputs that have carry-propagate chains shorter than the length for which the adder has been designed. An improvement is proposed to an earlier design of a speculative adder, by using Ling equations to speed it up. The resulting speculative adder, called the ACLA has been compared with the earlier design and traditional adders like Ling and Kogge-Stone in terms of area, delay and number of gates required. The ACLA is at least 9.8% faster and 20% smaller than the previous design. A circuit for error detection and error correction has also been implemented, resulting in the Reliable Adder (RA). When implemented as a sequential circuit, such a combination of ACLA and RA can significantly increase the average speed of the adder unit.

Citation Download Citation

Malhar Mehta, Amith Kumar Nuggehalli Ramachandra, and Earl E. Swartzlander Jr. "Implementation of a speculative Ling adder", Proc. SPIE 7444, Mathematics for Signal and Information Processing, 74440K (24 August 2009); https://doi.org/10.1117/12.824730

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KEYWORDS

Bismuth

Logic

Signal processing

Silicon

Clocks

Picosecond phenomena

Binary data

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