30 September 2009 Correlation of overlay performance and reticle substrate non-flatness effects in EUV lithography
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Proceedings Volume 7488, Photomask Technology 2009; 748816 (2009); doi: 10.1117/12.834746
Event: SPIE Photomask Technology, 2009, Monterey, California, United States
Abstract
Image placement (IP) and overlay error specifications in the International Technology Roadmap for Semiconductors (ITRS) continue to get tighter with each successive technology node. One of the significant contributors to IP error is the non-flatness of the reticle substrate. In this paper, we will discuss in detail the effect of reticle substrate shape on the overlay performance in extreme ultraviolet (EUV) tools. Substrate shape-induced overlay effects are important when multiple device levels are printed using EUV lithography. We present an analysis of 20 blanks with different flatness specifications for overlay signatures when used for printing multiple device levels. A comprehensive analysis of scanner correctable and non-correctable errors for different substrate shapes will also be presented. Non-flatness specifications for EUV blanks will be reviewed based on these reticle-matching results. We will discuss results from flatness measurements and the effect on overlay budget due to mismatched substrates using several substrates with different flatness specifications.
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Sudhar Raghunathan, Adam Munder, John Hartley, Jaewoong Sohn, Kevin Orvek, "Correlation of overlay performance and reticle substrate non-flatness effects in EUV lithography", Proc. SPIE 7488, Photomask Technology 2009, 748816 (30 September 2009); doi: 10.1117/12.834746; https://doi.org/10.1117/12.834746
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KEYWORDS
Reticles

Extreme ultraviolet

Extreme ultraviolet lithography

Overlay metrology

Error analysis

Scanners

Semiconducting wafers

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