Paper
29 September 2009 Wafer topography proximity effect modeling and correction for implant layer patterning
Hua Song, James Shiely, Irene Su, Lin Zhang, Wen-Kang Lei
Author Affiliations +
Abstract
Photolithography on reflective surfaces with topography can cause overexposure in some areas in the photoresist, resulting in undesired critical dimension (CD) variations in the printed patterns. Using bottom anti-reflective coatings (BARCs) will reduce the severity of the problem. However it is not a preferred solution in some situations due to added process complexity, such as the case of implant blocking layer patterning. This topography proximity effect (TPE) has been ignored in the mask synthesis flow for the 45nm and larger nodes due to its relatively small impact to the CDs. When the device critical length reaches 32nm and lower, the variations on the implant layer caused by underlying topography becomes more and more an issue and need to be addressed properly. In order to do that, simulation with nonplanar stack is required. The available tools for photolithography simulation with wafer topography, such as Synopsys' Sentaurus Lithography (S-Litho), usually adopt a rigorous approach based on the solution of the Maxwell equations and unsuitable for full chip optical proximity correction (OPC) due to their prohibitively long runtimes. A fast method for TPE modeling is needed to make full chip TPE correction feasible. In this paper, we propose a computationally fast approximate method that captures TPE well. It enables fast model calibration and full chip implant layer mask correction, and fits in the current OPC flows easily. We validate the method's effectiveness by comparing its simulation results with those produced by Sentaurus Lithography. We also show how it helps implant layer mask synthesis that takes TPE from previous layers into consideration.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Hua Song, James Shiely, Irene Su, Lin Zhang, and Wen-Kang Lei "Wafer topography proximity effect modeling and correction for implant layer patterning", Proc. SPIE 7488, Photomask Technology 2009, 74883F (29 September 2009); https://doi.org/10.1117/12.829725
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CITATIONS
Cited by 1 scholarly publication and 1 patent.
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KEYWORDS
Semiconducting wafers

Optical proximity correction

Photomasks

Cadmium

Optical lithography

Critical dimension metrology

Calibration

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