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30 October 2009 The hardware implementation for real-time network video processing and transportation based on FPGA and DSP
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Proceedings Volume 7497, MIPPR 2009: Medical Imaging, Parallel Processing of Images, and Optimization Techniques; 74970U (2009) https://doi.org/10.1117/12.833696
Event: Sixth International Symposium on Multispectral Image Processing and Pattern Recognition, 2009, Yichang, China
Abstract
This paper research on a high definition Ship-borne radar and video monitoring system which requires multi-channel TV video and radar video encoding and decoding ability. The real time data transferring is based on RTP/RTCP protocol with guarantee of QoS. In this paper, we propose an effective Feedback control for real time video stream to combine with forward error correction (FEC). In our scheme, the server multicasts the video in parallel with FEC packets and adaptive RTCP feedback control of the video stream. On the server side, we analyze and optimize the number of streams and FEC packets to meet a certain residual loss requirement. For every RTT round trip time, the sender sends a forward RTCP control packet. On the receiver side, we analyze the optimal combination of FEC and packets to minimize its loss. Upon the receipt of a backward RTCP packet with the packet loss ratio from the receiver, the output rate of the source is adjusted. Additive increase and multiplicative decrease (AIMD) model can achieve efficient congestion preventing when the accurate available bandwidth is estimated by the backward RTCP packet.
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Xuan Liang, Huosheng Xu, Xi Chen, and Yu Fan "The hardware implementation for real-time network video processing and transportation based on FPGA and DSP", Proc. SPIE 7497, MIPPR 2009: Medical Imaging, Parallel Processing of Images, and Optimization Techniques, 74970U (30 October 2009); https://doi.org/10.1117/12.833696
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