24 November 2009 Interline transfer area CCD imaging system with FPGA for real-time processing
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The paper presents the hardware and software design of an area CCD imaging system with FPGA for real-time processing, which can be used in image capture system. The interline transfer area CCD uses ICX424AQ from Sony Company. The paper makes a detailed analysis on the structure parameters of ICX424AQ and the image capture principle. On this basis, the design realizes the CCD control sequence and the timing logic of the whole capture system. The area CCD image sensor is covered by Bayer color filter array (CFA). Each pixel has only one component of three primary colors. In order to obtain full chromaticity at every pixel, the paper adopts an improved bilinear interpolation algorithm. The CCD is working under progressive scan mode. All pixel signals are read out continuously at the exposing time of 0.32ms. The whole system is controlled by FPGA, the pixel data transmits by transmitting chip SiI1162. At last, the design realizes the real-time display on TFT-LCD.
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Feng Ran, Feng Ran, Hui Yang, Hui Yang, "Interline transfer area CCD imaging system with FPGA for real-time processing", Proc. SPIE 7513, 2009 International Conference on Optical Instruments and Technology: Optoelectronic Imaging and Process Technology, 75130Y (24 November 2009); doi: 10.1117/12.837019; https://doi.org/10.1117/12.837019

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