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11 December 2009 Mask defect specification in the spacer patterning process by using a fail-bit-map analysis
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Proceedings Volume 7520, Lithography Asia 2009; 752014 (2009) https://doi.org/10.1117/12.837132
Event: SPIE Lithography Asia, 2009, Taipei, Taiwan
Abstract
We obtained the acceptable mask defect size for both opaque and clear defects in the spacer patterning process using the fail-bit-map analysis and a mask with programmed defects. The spacer patterning process consists of the development of photoresist film, the etching of the core film using the photoresist pattern as the etching mask, the deposition of a spacer film on both sides of the core film pattern, and the removal of the core film. The pattern pitch of the spacer film becomes half that of the photoresist. Both the opaque defect and the clear defect of the mask resulted in a short defect in the spacer pattern. From the fail-bit-map analysis, the acceptable mask defect size for opaque and clear defects was found to be 80nm and 120nm, respectively, which could be relaxed from that in ITRS2008. The difference of the acceptable mask defect size for opaque and clear defects comes from the difference of the defect printability at the resist development.
© (2009) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Seiro Miyoshi, Shinji Yamaguchi, Masato Naka, Keiko Morishita, Takashi Hirano, Hiroyuki Morinaga, Hiromitsu Mashita, Ayumi Kobiki, Makoto Kaneko, Hidefumi Mukai, Minori Kajimoto, Takashi Sugihara, Yoshiyuki Horii, Yoshihiro Yanai, Tadahito Fujisawa, Kohji Hashimoto, and Soichi Inoue "Mask defect specification in the spacer patterning process by using a fail-bit-map analysis", Proc. SPIE 7520, Lithography Asia 2009, 752014 (11 December 2009); https://doi.org/10.1117/12.837132
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