Presently, most defective problems in silicon based devices can be traced ultimately to stresses developed during various
fabrications process stages. If the process induced stresses exceed the critical stress magnitude, dislocations occur to
relax the stain. Subsequently, other defects such as cracks, chips and void related to stresses may surface. Hence an
understanding of the development, effects and possible avoidance of residual stress is vital and even more important for
the semi-conductor industries as it goes into the nanometer technology. Whether process-induced, residual stress is a
significant factor in high wafer breakage rates during microelectronic fabrication. Identifying the cause and initiation
point of brittle fracture in processed wafers is an important first step towards the goal of making this and other newer
technologies based on silicon commercially competitive.
Infrared Phase Shift Gray Field which has showed some promises on residual stress measurement on silicon devices
ranging from microelectronics to photovoltaic industry will be employed and developed. This method is based on the
well known photoelastic principles, where the stress variations are measured based on the changes of light propagation
velocity in birefringence material. In this research, the residual stress patterns that are not visible via conventional
infrared transmission method will be used to locate defects. The magnitude of the residual stress fields associated with
each defect is examined qualitatively and quantitatively. Firstly, the inspection of defects on wafer surface in early stage
of wafer fabrication processes will be carried out. Next, an investigation of trapped particles and defects in bonded wafer
with using the associated residual stress field will be also be covered.