25 January 2010 Reducing crosstalk in vertically integrated CMOS image sensors
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Abstract
Image sensors can benefit from 3D IC fabrication methods because photodetectors and electronic circuits may be fabricated using significantly different processes. When fabricating the die that contains the photodetectors, it is desirable to avoid pixel level patterning of the light sensitive semiconductor. But without a physical border between adjacent photodetectors, lateral currents may flow between neighboring devices, which is called "crosstalk". This work introduces circuits that can be used to reduce crosstalk in vertically-integrated (VI) CMOS image sensors with an unpatterned photodetector array. It treats the case of a VI-CMOS image sensor composed of a silicon die with CMOS read-out circuits and a transparent die with an unpatterned array of photodetectors. A reduction in crosstalk can be achieved by maintaining a constant electric potential at all nodes, at which the photodetector array connects with the readout circuit array. This can be implemented by designing a pixel circuit that uses an operational amplifier with a logarithmic feedback to control the voltage at the input node. The work presents several optional circuit configurations for the pixel circuit, and indicates the one that is the most power efficient. Afterwards, it uses a simplified small-signal model of the pixel circuit to address stability and compensation issues. Lastly, the method is validated through circuit simulation for a standard CMOS process.
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Orit Skorka, Dileepan Joseph, "Reducing crosstalk in vertically integrated CMOS image sensors", Proc. SPIE 7536, Sensors, Cameras, and Systems for Industrial/Scientific Applications XI, 75360N (25 January 2010); doi: 10.1117/12.839115; https://doi.org/10.1117/12.839115
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