1 December 2009 40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing
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Proceedings Volume 7632, Optical Transmission Systems, Switching, and Subsystems VII; 763212 (2009) https://doi.org/10.1117/12.853294
Event: Asia Communications and Photonics, 2009, Shanghai, Shanghai , China
Abstract
Principle of 7 × 5.71 Gbit/s on-off-keyed (OOK) over duty cycle division multiplexing (DCDM) technique is presented. The 40 Gbit/s DCDM signals are then recovered with a receiver operates at 5.71 GHz clock using seven sampling circuits. With seven-user DCDM we show that spectral width of return-to-zero signal can be reduced around 42.8 %. The 40 Gbit/s OOK using DCDM required an optical signal-to-noise ratio of around 31.6 dB and tolerate around 50 ps/nm of chromatic dispersion. In addition, performance of the system is compared against other multiplexing techniques and modulation formats.
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G. Amouzad Mahdiraji, G. Amouzad Mahdiraji, A. Malekmohammadi, A. Malekmohammadi, A. Fauzi Abas, A. Fauzi Abas, M. Khazani Abdullah, M. Khazani Abdullah, } "40 Gbit/s on-off-keyed system with 5.71 GHz clock recovery circuit using duty cycle division multiplexing", Proc. SPIE 7632, Optical Transmission Systems, Switching, and Subsystems VII, 763212 (1 December 2009); doi: 10.1117/12.853294; https://doi.org/10.1117/12.853294
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