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25 March 2010 Topcoat-less resist process for 2Xnm node devices
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In recent years ArF immersion lithography in memory devices, topcoat process has become baseline process in mass production in spite of its additional process steps and high cost-of-ownership. In order to overcome low process efficiency of topcoat process, high throughput scanner with higher scan speed and advanced rinse modules for decreasing defectivity are under development. Topcoat-less resist is also upgraded gradually which contains hydrophobic additives enables the extreme patterning without topcoat and high speed scanning. But current topcoat-less process has not matured yet for the dark-field mask compared to bright-field because of the blob defect in unexposed area. To minimizing blob defect level both material and process sequence should be optimized effectively. The authors have focused on blob defect and litho performance of topcoat-less resist process for dark field application in 2Xnm node devices.
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Changil Oh, Junghyung Lee, Junggun Heo, Hyunkyung Shim, Keundo Ban, Cheolkyu Bok, Donggyu Yim, and Sungki Park "Topcoat-less resist process for 2Xnm node devices", Proc. SPIE 7639, Advances in Resist Materials and Processing Technology XXVII, 76393A (25 March 2010); doi: 10.1117/12.846707;


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