10 March 2010 Process window and integration results for full-chip model-based assist-feature placement at the 32 nm node and below
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Abstract
Model-based assist-feature (MBAF) placement has been shown to have considerable lithographic benefits vs. rule-based assist-feature (RBAF) placement for advanced technology-node requirements. For very strong off-axis illumination, MBAF-placement methods offer improved process window, especially for so-called forbidden pitch regions, and greatly simplified tuning of AF-placement parameters. Historically, however, MBAF-placement methods had difficulties with full-chip runtime, friendliness to mask manufacturing (e.g., mask rule checks or MRCs), and methods to ensure that placed AFs do not print on-wafer. Therefore, despite their known limitations, RBAF-placement methods were still the industry de facto solution through the 45 nm technology node. In this paper, we highlight recent manufacturability advances for MBAFs by a detailed comparison of MBAF and RBAF methods. The MBAF method employed uses Inverse Mask Technology (IMT) to optimize AF placement, size, shape, and software runtime, to meet the production requirements of the 28 nm technology node and below. MBAF vs. RBAF results are presented for process window performance, and MBAF vs. OPC results are presented for full-chip runtimes. The final results show that MBAF methods have process-window advantages for technology nodes below 45 nm, with runtimes that are comparable to OPC.
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Ji Li, Ji Li, Gerard Luk-Pat, Gerard Luk-Pat, Amyn Poonawala, Amyn Poonawala, Kevin Lucas, Kevin Lucas, Ben Painter, Ben Painter, } "Process window and integration results for full-chip model-based assist-feature placement at the 32 nm node and below", Proc. SPIE 7640, Optical Microlithography XXIII, 76401W (10 March 2010); doi: 10.1117/12.848443; https://doi.org/10.1117/12.848443
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