30 March 2010 A digital logic nanowire for reliability enhancement
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Due to the many random factors from thermal fluctuations to wave interference, computational perfection in nanoICs is difficult to achieve. Defects and faults arise from instability and noise proness of nanoICs, which lead to unreliable results. A probabilistic computational model is needed to reduce such errors and to achieve more reliable computation. The probabilities of the outputs of this model can be calculated by the arithmetic expressions of the Boolean functions. This paper presents a method for transforming a low noisy reliability nanocircuit into a high reliability nanocircuit without using any hardware redundancy techniques. A class of nanocircuits, called reliability enhancement nanocircuits (RENC) is introduced. Each RENC is a simple logic circuit with a single input and output. It is shown that with a proper setting of the "logic threshold value" of the RENC, which determines logic value 0 or 1 for the input and output, the output (reliability) of RENC can be higher than its input reliability. Thus, when a RENC is connected to an output of a nanocircuit, the reliability of the entire circuit can be enhanced. A reliability enhancement nanowire (RENW) can be formed by cascading n number RENCs. It is also shown that by connecting each output of a low reliability nanocircuit with a RENW with sufficient number of RENCs , the reliability of the nanocircuit can be raised to any desirable higher level. This method is illustrated by examples and is applicable to any digital nanocircuit design using any nanotechnology.
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Samuel C. Lee "A digital logic nanowire for reliability enhancement", Proc. SPIE 7646, Nanosensors, Biosensors, and Info-Tech Sensors and Systems 2010, 76460O (30 March 2010); doi: 10.1117/12.847423; https://doi.org/10.1117/12.847423

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