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13 May 2010 Investigation of CMOS photodiodes integrated on an ASIC by a 0.5-µm analog CMOS process
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The characteristics of photodiodes integrated on CMOS ASICs depend on wavelength of radiation, structure of the photodiode itself and the parameters of the process of production. In this paper, the influence of the structure of integrated CMOS photodiodes produced in a standard 0.5 μm mixed signal CMOS process on the sensitivity is described. These photodiodes are used as image sensor elements arranged in an array for noncontact optoelectronic measurements. Models of integrated photodiodes distinguish the lateral and the vertical region of the photodiodes. The standard 0.5 μm CMOS process offers three types of pn-junctions: n+/p-substrate, p+/n-well and n-well/p-substrate. Based on our previous research and on the results from other authors the p+/n-well is chosen due to its better sensitivity and isolation against other structures. The local sensitivity is measured with a scanning setup by applying a diffraction limited spot spot of light on the surface of the diodes. Independent of the wavelength of radiation the charge carriers are generated mainly in the lateral region and not - as expected - in the vertical region. The maximum value of the local sensitivity is found in photodiodes with subdivided p+ regions showing a distance of 1.5 μm between these regions in the space between these two adjacent p+ regions. This local sensitivity is three times smaller than that of a reference PIN photodiode. According to this result, the new photodiodes will be constructed with optimized geometries. All examined structures of this type of photodiodes show a maximal spectral sensitivity in the range of 650 nm - 700 nm.
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H. Luo, U. Ricklefs, and H. Hillmer "Investigation of CMOS photodiodes integrated on an ASIC by a 0.5-µm analog CMOS process", Proc. SPIE 7726, Optical Sensing and Detection, 772624 (13 May 2010);

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