26 May 2010 Compensating for image placement errors for the HP 3X nm node
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Proceedings Volume 7748, Photomask and Next-Generation Lithography Mask Technology XVII; 77481E (2010) https://doi.org/10.1117/12.867721
Event: Photomask and NGL Mask Technology XVII, 2010, Yokohama, Japan
As the feature size is smaller, the overlay budget of lithography for the rigorous manufacturing control becomes so small. And, overlay accuracy has become more important due to small overlap margin and double patterning process. Recently, a scanner maker has developed several effective solutions to correct the errors of overlay in field. But, the error induced by photomask still remains, so the accuracy of photomask image placement is required below than several nm for the HP 3X nm memory device generation. But, current e-beam writers don't meet this specification. There are various sources of image placement errors. Many papers report their analysis of those errors, so we focus on e-beam charging effect and compensation. Especially, their compensating methods are too complex to apply to production. So, it is need a simple way to compensate to image placement errors effectively.
© (2010) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Eui Sang Park, Eui Sang Park, Sang Pyo Kim, Sang Pyo Kim, Tae Joong Ha, Tae Joong Ha, Chang Reol Kim, Chang Reol Kim, } "Compensating for image placement errors for the HP 3X nm node", Proc. SPIE 7748, Photomask and Next-Generation Lithography Mask Technology XVII, 77481E (26 May 2010); doi: 10.1117/12.867721; https://doi.org/10.1117/12.867721

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