Characteristics of transparent PLZT ceramics can be tailored by controlling the component of them, and therefore
showed excellent dielectric, piezoelectric, pyroelectric and ferroelectric properties. To integrate the ceramics with
microelectronic circuit to realize integrated applications, the ceramic wafers have to be thinned down to micrometer scale
in thickness. A7/65/35 PLZT ceramic wafer was selected in this study for the thinning process. Size of the wafer was
10×10mm with an initial thickness of 300μm.
A novel membrane transfer process (MTP) was developed for the thinning and integration of the ceramic wafers. In the
MTP process, the ceramic wafer was bonded to silicon wafer using a polymer bonding method. Mechanical grinding
method was applied to reduce the thickness of the ceramic. To minimize the surface damage in the ceramic wafer caused
by the mechanical grinding, magnetorheological finishing (MRF) method was utilized to polish the wafer. White light
interference (WLI) apparatus was used to monitor the surface qualities of the grinded and ploished ceramic wafers.
For the PLZT membrane obtained from the MTP process, the final thickness of the thinned and polished wafer was
10μm, the surface roughness was below 1nm in rms, and the flatness was better than λ/5.