We report on the architectural design and fabrication of medium and large arrays of single-photon avalanche diodes
(SPADs) for a variety of applications in physics, medicine, and the life sciences. Due to dynamic nature of SPADs,
designs featuring a large number of SPADs require careful analysis of the target application for an optimal use of silicon
real estate and of limited readout bandwidth. This paper describes the main trade-offs involved in architecting such chips
and the solutions adopted with focus on scalability and miniaturization.
E. Charbon, E. Charbon,
"Single-photon Imaging in CMOS", Proc. SPIE 7780, Detectors and Imaging Devices: Infrared, Focal Plane, Single Photon, 77801D (17 August 2010); doi: 10.1117/12.862371; https://doi.org/10.1117/12.862371