8 February 2011 Photonic network-on-chip architecture using 3D integration
Author Affiliations +
Proceedings Volume 7942, Optoelectronic Integrated Circuits XIII; 79420M (2011) https://doi.org/10.1117/12.880152
Event: SPIE OPTO, 2011, San Francisco, California, United States
We introduce a multi-layer silicon photonic microring resonator filter, fabricated using deposited materials, and transmit up to 12.5-Gb/s error-free data, establishing a novel class of high-performance silicon photonics for advanced photonic NoCs. Furthermore, by leveraging deposited materials, we propose a novel fully-integrated scalable photonic switch architecture for data center networks, sustaining nonblocking 256×256 port size with nanosecond-scale switching times, interconnecting 2,560 server racks with 51.2-Tb/s bisection bandwidth.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Aleksandr Biberman, Aleksandr Biberman, Nicolás Sherwood-Droz, Nicolás Sherwood-Droz, Xiaoliang Zhu, Xiaoliang Zhu, Kyle Preston, Kyle Preston, Gilbert Hendry, Gilbert Hendry, Jacob S. Levy, Jacob S. Levy, Johnnie Chan, Johnnie Chan, Howard Wang, Howard Wang, Michal Lipson, Michal Lipson, Keren Bergman, Keren Bergman, } "Photonic network-on-chip architecture using 3D integration", Proc. SPIE 7942, Optoelectronic Integrated Circuits XIII, 79420M (8 February 2011); doi: 10.1117/12.880152; https://doi.org/10.1117/12.880152

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