In the perspective of a future all-optical communication network optical shift register will play an important role
especially for what concerns several binary functions, such as serial to parallel conversion and cyclic operations, that are
involved in techniques allowing error detection and correction as parity check, or cyclic redundancy check. During the
last decades, several attempts of realizing circulating memories or shift register in the optical domain were made, with
some limits in terms of functionality, number of bit to be stored (under three), scalability or photonic integrability.
In this paper, we present a new approach to realize a circulating optical shift register consisting on an SOA-based optical
buffer (OB) and a bit selecting circuit (BSC). The OB is potentially integrable and is able to store a finite number of bit
at high bit rate. The BSC returns consecutive bits at a lower clock rate, achieving proper shift register function. The bit
selection is realized by means of four wave mixing (FWM) in a Kerr medium, and the sequence cancellation is allowed
to enable new sequence storing. Experimental validation of the scheme for fB=59MHz and fB=236MHz shows optical
signal to noise ratio per bit penalty of 5.6dB at BER=10-9.