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7 February 2011 Hardware implementation of N-LUT method using field programmable gate array technology
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Abstract
Hardware implementation for holographic 3D display application is researched by many researchers. Therefore, in this paper, we propose the hardware implementation method for novel look-up table (N-LUT) method using Field Programmable Gate Array (FPGA) technology. In the proposed method, calculation process is divided by some segment block for fast parallel processing of calculation of N-LUT method. That is, by using parallel processing by use of some segmented block based on FPGA technology, calculation speed of CGH can be increased
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Do-woo Kwon, Seung-Cheol Kim, and Eun-Soo Kim "Hardware implementation of N-LUT method using field programmable gate array technology", Proc. SPIE 7957, Practical Holography XXV: Materials and Applications, 79571C (7 February 2011); https://doi.org/10.1117/12.876616
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