In this paper, we demonstrate a computer model for simulating a dual-rate burst mode receiver that can
readily distinguish bit rates of 1.25Gbit/s and 10.3Gbit/s and demodulate the data bursts with large power
variations of above 5dB. To our knowledge, this is the first such model to demodulate data bursts of
different bit rates without using any external control signal such as a reset signal or a bit rate select signal.
The model is based on a burst-mode bit rate discrimination circuit (B-BDC) and makes use of a unique
preamble sequence attached to each burst to separate out the data bursts with different bit rates. Here, the
model is implemented using a combination of the optical system simulation suite OptSimTM, and the
electrical simulation engine SPICE. The reaction time of the burst mode receiver model is about 7ns, which
corresponds to less than 8 preamble bits for the bit rate of 1.25Gbps. We believe, having an accurate and
robust simulation model for high speed burst mode transmission in GE-PON systems, is indispensable and
tremendously speeds up the ongoing research in the area, saving a lot of time and effort involved in
carrying out the laboratory experiments, while providing flexibility in the optimization of various system
parameters for better performance of the receiver as a whole. Furthermore, we also study the effects of
burst specifications like the length of preamble sequence, and other receiver design parameters on the
reaction time of the receiver.