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4 April 2011 EBPC for multi-beams low kV electron projection lithography
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It is now obvious that the path leading to denser IC has become hazardous since 193nm scanners have been operating beyond their resolution limit. However if the tools that could provide photo-lithographers with some relief are not in production yet, luckily enough, good progresses were made in developing alternative photolithography techniques. Among them, massively parallel mask less lithography stands out as a serious candidate since it can achieve the required resolution at the right cost of ownership provided targeted throughput performance is reached. This paper will focus on this latter technique and more precisely, will report on part of the development works performed at CEA/LETI using the MAPPER technology inside the open multi-partners program IMAGINE. Data preparation is certainly not the easiest part in the technology. Indeed, layouts are basically turned into huge bitmap streams containing the information to be sent to the thousands of parallel beams working all together to print the patterns correctly. Addressing the low energy specific case, we had studied several ways of performing this step involving geometrical correction with and without dose modulation. The results were analysed against the achieved design to wafer fidelity and the robustness of the patterns with respect to process variations and shot noise. The intention of the paper is therefore to give a status towards where E-Beam Proximity Correction (EBPC) performance stands today using current MAPPER alpha tool. It will also provide with some insights about how corrections will be performed on the HVM tool.
© (2011) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jérôme Belledent, Sébastien Soulan, and Laurent Pain "EBPC for multi-beams low kV electron projection lithography", Proc. SPIE 7970, Alternative Lithographic Technologies III, 79701B (4 April 2011);


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