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28 March 2011 Challenges of SEM-based critical dimension metrology of interconnect
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Semiconductor technology is advancing below 50 nm critical dimensions bringing unprecedented challenges to process engineering, control and metrology. Traditionally, interconnect metrology is put behind high-priority gate metrology; however, considering metrology, process and yield control challenges this decision is not always justified. Optical scatterometry is working its way to interconnect manufacturing process control, but scanning electron microscopy (SEM) remains the number one critical dimension (CD) metrology for interconnect process engineering and optical proximity correction (OPC) modeling. Recently, several publications have described secondary electron (SE) trapping within narrow high-aspect ratio interconnect structures. In these papers, pre-dosing of the sample helped to extract SE from the bottom of the hole and measure its diameter. Based on current understanding of the phenomenon, one should expect that high-aspect ratio interconnect structures (holes and trenches) with critical dimensions below 100 nm may show signs of SE trapping of various degree. As a result, there may be an uncontrolled effect on SE waveform and, therefore, bias of CDSEM measurement. CD atomic force microscopy (AFM) was employed in this work as a reference metrology for evaluation of uncertainty of trench and hole measurements by CDSEM. As the data indicates, CDSEM bias shows a strong dependence on pitch of periodic interconnect structure starting from drawn CD of 50 nm. CDSEM bias variation for the evaluated set of samples is about 19 nm. A typical OPC sample consists of both photoresist and etched interlayer materials. As the AFM data for photoresist material indicates, the hole diameter changes quite significantly with depth and the hole profile varies from one OPC structure to another. Abe et al. [1] have used a clever way to correlate physical bottom diameter of holes with CDSEM measurements and demonstrated that for their process and dimensions the SEM "top" diameter and physical bottom diameter correlate well. Unfortunately, this conclusion can't be generalized and measurement uncertainty of CDSEM must be evaluated on an individual technology/process basis. A more general approach to improve CDSEM accuracy is necessary which is based upon SI-traceable CDSEM bias measurements, modeling and correction.
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Vladimir A. Ukraintsev, Scott Jessen, Brian Mikeska, Chris Sallee, and Vitali Khvatkov "Challenges of SEM-based critical dimension metrology of interconnect", Proc. SPIE 7971, Metrology, Inspection, and Process Control for Microlithography XXV, 797109 (28 March 2011);

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